/*
 * =====================================================================================
 * Copyright (C) 2023 Ingenic Semiconductor Co.,Ltd
 * All Rights Reserved
 *
 * Filename     : reg_intc.h
 * Author       : Keven <keven.ywhan@ingenic.com>
 * Created      : 2024/06/05 11:15
 * Description  :
 *
 * =====================================================================================
 */

#ifndef __REG_INTC_H__
#define __REG_INTC_H__

#define ICSR0           (0x00)    /*!< IRQ Source Register                         */
#define ICMR0           (0x04)    /*!< IRQ Mask Register                           */
#define ICMSR0          (0x08)    /*!< IRQ Mask Set Register                       */
#define ICMCR0          (0x0C)    /*!< IRQ Mask Clear Register                     */
#define ICPR0           (0x10)    /*!< IRQ Pending Register                        */
#define ICSR1           (0x20)    /*!< IRQ Source Register                         */
#define ICMR1           (0x24)    /*!< IRQ Mask Register                           */
#define ICMSR1          (0x28)    /*!< IRQ Mask Set Register                       */
#define ICMCR1          (0x2C)    /*!< IRQ Mask Clear Register                     */
#define ICPR1           (0x30)    /*!< IRQ Pending Register                        */
#define DSR0            (0x34)    /*!< IRQ Source Register0 for PDMA               */
#define DMR0            (0x38)    /*!< IRQ Mask Register0 for PDMA                 */
#define DPR0            (0x3C)    /*!< IRQ Pending Register0 for PDMA              */
#define DSR1            (0x40)    /*!< IRQ Source Register1 for PDMA               */
#define DMR1            (0x44)    /*!< IRQ Mask Register1 for PDMA                 */
#define DPR1            (0x48)    /*!< IRQ Pending Register1 for PDMA              */

#endif /* __REG_INTC_H__ */
